Finite State Machine

A Finite State Machine (FSM) is the fundamental design pattern for any digital circuit that has memory(sequential logic). If a circuit's output depends not just on the current inputs, but also on the sequence of past inputs, you need an FSM.

The core idea is state.

A "state" is a snapshot of the system's history—it's the memory of what has happened before. An FSM is a system that can only be in a limited (finite) number of these states. It moves from one state to another based on its inputs and a clock signal.

Think of an FSM as the "brain" or "control unit" for a sequential process.

The Core Anatomy of an FSM

Every synchronous FSM is built from three essential parts. Understanding these three parts is the key to understanding all FSMs.

1. State Register (Memory)

2. Next State Logic

3. Output Logic